Electronic Design

Creating On-Chip MEMS Sensors in CMOS

Nanusens' novel approach to creating nanoscale sensor structures inside the CMOS layers. How the methodology helps shrink cost and size. Previously, MEMS sensors were created by employing proprietary ...
Electronic Design

CMOS Circuit Design, Layout, and Simulation: Second Edition

As author R. Jacob “Jake” Baker points out in the preface to this comprehensive volume, CMOS technology has dominated the fabrication of ICs for 25 years, and is likely to dominate it for another 25 ...
Semiconductor Engineering

The Future Of MEMS Design: Making MEMS Design More Like CMOS Design

MEMS-based component suppliers want to rapidly ramp their designs into high-volume production. This demand is driving MEMS suppliers to focus on ways to more efficiently re-use established process ...
Semiconductor Engineering

Considerations for Porting a Bulk CMOS Design to FD-SOI

Technologists describe a straight port of an existing bulk CMOS design to FD-SOI at the same node, obtaining the value of fully depleted SOI for a modest redesign effort. November 16th, 2012 - By: ...
EDN

IC Performance: Challenges in Layout with CMOS Technology Nodes

Editor’s note: I am pleased to bring you an important technical blog by Fernando Lavalle, a Ph.D. student at Texas A&M University and his colleague, Suraj Prakash, who have been working and studying ...
EDN

Additional structures in analog layout beyond schematic

A schematic diagram is not a detailed blueprint of an analog circuit; instead, it’s more like architectural sketch of the circuit. Look at any schematic for a CMOS analog IC circuit and you will see ...